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NetLogic Microsystems, Inc. [NASDAQ: NETL] is constantly seeking qualified, dedicated and motivated individuals looking for their next career challenge. We offer competitive benefits and stock options!
NetLogic Microsystems offers a competitive benefits package with several options for full-time regular employees. Our flexible benefits package allows you to select the benefits that are right for you.
1. High Performance CPU Memory Subsystem Verification Engineer

Responsibilities:
- Verify architecture and micro-architecture functionality and performance features of state of the art MIPS processor base System on Chip (SoC) with multi-core and multi-thread CPUs
- Use CPU architecture/Level-1/Level-2 cache coherency knowledge to develop and execute test plans
- Contribute to the continual development of module and SoC level verification environments (e.g., checkers, monitors)
- Collaborate with logic designers on RTL model debug,
bug fixes, and integration
Requirements:
- BS in CS or EE (MS preferred) with 4-8 years of relevant experience
- Prior knowledge of the design to be tested: Micro-processor (CPU) and/or Level-1/Level-2 cache coherency and memory sub-system
- Demonstrated knowledge and experience in programming Verilog, C, C++
- Strong verification skills, understanding of methodology (white-box, black-box, focused test, random testing, coverage)
- Prior experience with UNIX/Linux development
environment: shell/Perl scripting
- Self-motivated team player able to thrive in a fast-paced
engineering environment
- Scripting languages such as Perl
- Assertion languages - System Verilog a Plus
2. High Performance CPU Pipeline Verification Engineer
Responsibilities:
- Verify architecture and micro-architecture functionality and performance features of state- of-the-art MIPS SoC with multi-core and
multi-thread CPUs
- Use CPU architecture/micro-architecture knowledge to develop
and execute test plans
- Collaborate with logic designers on RTL model debug,
bug fixes, and integration
Requirements:
- BSEE/CS, MSEE preferred with 3-8 years of relevant experience
- Prior knowledge of the design to be tested: Micro-processor (CPU) internal pipeline
- Demonstrated knowledge and experience in programming Verilog, C, C++
- Strong verification skills, understanding of methodology (white-box, black-box, focused test, random testing, coverage)
- Prior experience with UNIX/Linux development environment: shell/Perl scripting
- Assertion languages experience such as System Verilog
3. High Performance, State-of-the art CPU Design Engineer
We are looking for mid-level microprocessor design engineers that have the drive to learn and challenge themselves on high performance multi-processor MIPS SoC products built on 40nm and beyond process technologies.
The successful candidate will be a hands-on CPU Logic Designer responsible for performing micro-architecture and logic design. He/She will work on advanced processor design concepts such as Out-of-Order Instruction Scheduling and Execution, Multi-Threading, high performance cache subsystem etc.
He/she will contribute to the advancement of Netlogic’s cutting-edge logic design methodology and to the continual improvement of critical methodology linkages to circuit, physical design, and design verification.
This individual will work effectively with design verification engineers to recommend and help develop verification and test strategies for various design blocks, and will also work closely with circuit designers to merge logic and circuit techniques together to meet design objectives.
Requirements:
- BSEE with 3 to 5 years directly related experience
- Must possess knowledge in the area of internal microprocessor logic design demonstrated by having worked on one or more of the MIPS, SPARC, X86, PowerPC, ARM based core-processor pipeline
- Must have worked on at least one SoC design with direct participation in micro- architecture and logic design through tapeout.
- Knowledge of Verilog, multi-domain clock synchronization, pipelining, and low- power design techniques.
- Working familiarity with various families of high performance circuit techniques and their tradeoffs.
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Benefits.
Medical insurance
(2 options provided)
Dental insurance
Life and accidental death
and disability insurance
Long term
disability insurance
401K retirement plan
Stock option plan
Educational
assistance program
Personal time off
Paid Holidays
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