NetLogic Microsystems Au1200™ Media Processor

A High-Performance / Low-Power
A High-Performance/Low-Power MIPS® 400MHz at 0.5 Watt

Overview
NetLogic Microsystems’ industry-leading Alchemy® Processor family comprises a series of ultra low-power embedded processors that deliver the powerful processing performance, ultra low-power functionality and market specific integration required for next-generation products like enterprise thin clients, automotive infotainment, telematics, and other media rich embedded applications.

The NetLogic Microsystems' Ultra Low-Processor Power Au1000® processor provides a high-performance, low-power, high-integration chip targeting the Internet Edge device market. These devices include WAPs (Wireless Access Points), routers, gateways, printers, point of sale terminals, set top boxes, and Internet security products, such as firewalls and VPNs (Virtual Private Networking).

Product Description
The Au1000® processor is based on the MIPS32™ instruction set. Designed for optimal performance at very low power, the Au1000® processor is available up to 500MHz. Power dissipation measures less than half a watt for the 400MHz version. Highly integrated with on-chip memory controllers and Internet access peripherals, the Au1000 processor runs a variety of operating systems, including Windows® CE.NET, Linux, and VxWorks. Moreover, the integration of peripherals with NetLogic Microsystems’ unique, very high performance, MIPS-compatible core can provide lower system costs, smaller form factors, lower system power requirements, simpler designs at multiple performance points, and shorter design cycles. The Au1000 processor is available in both standard commercial temperature (0 - 70ºC) and industrial temperature (-40º - +85ºC) versions.

High-Speed MIPS CPU Core

266, 400 or 500MHz
MIPS32 Instruction Set
32-bit Architecture
16KB Instruction and 16KB Data Caches
High-speed Multiply-Accumulate (MAC) and Divide Unit
1.5-1.8V Core, 3.3V I/O

Highly-Integrated System Peripherals

GPIO (32 total, 5 dedicated for system use)
Two 10/100 Ethernet Controllers
USB Device and Host
Four UARTs
IrDA Controller (SIR, MIR and FIR)
AC-97 Controller
I2S Controller
Two SSI Controllers

High Bandwith Memory Buses

100/125MHz SDRAM Controller
SRAM/Flash EPROM Controller

Low System Power

Core MHz	Power (mW)
266	<300
400	500
500	900

Power-saving Modes
- Idle
- Sleep
Pseudo-static Design to 0Hz

Package

424-pin PBGA
19mm x 19mm

Operating System Support

Microsoft® Windows CE.NET
Linux
VxWorks

Development Tool Support

MIPS32-compatible Tool Set
100/125MHz SDRAM Controller SRAM/Flash EPROM Controller
Numerous Third-Party Compilers, Assemblers and Debuggers

Core Microarchitecture Highlights Pipeline

Scalar 5-stage Pipeline
Load/Store Adder in I-stage
Scalar Branch Techniques Optimized
Pipelined Register File Access in Fetch Stage
Zero Penalty Branch

Multiply-Accumulate (MAC) and Divide Unit

Max Issue Rate of one 32x16 MAC per Clock
Max Issues Rate of one 32x32 MAC per Every Other Clock
Operates in Parallel to CPU Pipeline
Executes all Integer Multiply and Divide Instructions
32 x 16-Bit MAC hardware

Internet Edge Processor

MMU

Instruction and Data Watch Registers for Software Breakpoints
Separate Interrupt Exception Vector
TLB
- 32 Dual-entry Fully Associative
- Variable Page Sizes 4KB -16MB
- 4-entry ITB

EJTAG Support

Caches

16KB Non-Blocking Data Cache
16KB Instruction Cache
Instruction/Data Caches are 4-way Set Associative
Write-Back with Read Allocate
Cache management Features
- Programmable Allocation Policy
- Line Locking
- Prefetch Instructions (instructions and data)
High-speed Access to On-chip Buses

Low Power Consumption

Core MHz	Core Voltage	Power(mW)
266	1.5	<300
400	1.5	500
500	1.8	900

Block Diagram

Diagram

Ordering Information

Valid Combinations
Au1000-266, Au1000-400, Au1000-500	MC	C
Au1000-266	MC	I

Contact Information

NetLogic Microsystems, Inc.
3975 Freedom Circle
Santa Clara, CA 95054, U.S.A.

Phone: +1 (408) 454-3000
Email: info@netlogicmicro.com
Web: www.netlogicmicro.com