Next Generation Multiprocessing

Overview and Benefits
The XLS204 processor from NetLogic Microsystems offers a cost-effective derivative version of the Multi-Core, Multi-Thread architecture, making it an ideal solution for next generation designs. The XLS204 processor leverages the original XLR® series performance, scalability and innovation while extending software compatibility throughout both product families and addressing applications where PCB real estate and power are premiums. The XLS204 is pin-compatible with other members of the XLS family

The XLS204 supports a rich set of features and integration with unprecedented power/performance for the embedded communication and telecommunication, enterprise wireless and wired-line LAN, and SMB networking applications. These solutions include integrated security appliances, wireless Access Points and switches, ATCA and AMC service cards, secured wire-line routers and switches, telecom media gateways, radio controllers and network signaling.

The XLS204 processor integrates general-purpose processing, high level programming, scalability with thread processing, intelligent packet management, and the ability to combine control plane, data plane and security operations on a single processor built on advanced submicron silicon technology.

Based on NetLogic Microsystems’ throughput-optimized Multi-Core, Multi-Threaded architecture, the XLS204 Processor integrates up to 4 fine-grain processing threads (using single-clock thread context switching) from its MIPS64 CPU. The XLS204 core contains four tightly coupled hardware threads capable of hiding latency, improving computational efficiency and throughput. The Fast Messaging Network™ (FMN) eliminates performance robbing semaphores and spinlocks found in multi-processor architectures and system loading due to intra-packet movement by supporting billions of in-flight messages and packet descriptors between all on-chip elements.

Additional features include large multi-level caches, an autonomous security accelerator, a DDR2 memory controller, four Gigabit Ethernet MACs providing SGMII and RGMII support, PCI-Express, and GPIO. The integrated peripheral I/O allows seamless integration in both today’s and next-generation platforms. The PCIe controllers and the quad network ports facilitate high throughput data connections in ATCA, AMC, bladed, proprietary fabric, backplane, and standalone planar based solutions.

The combination of dense computational performance, security acceleration, and network awareness makes the XLS204 processor an exceptional answer for embedded low power solutions for wired and wireless networking applications, such as radio access, call management, layer 3 signaling, deep packet inspection, content switching, routing, load balancing, forwarding and cryptography at line rates up to 1 Gbps.

Product Highlights

Next Generation Processor Cores 64-bit MIPS64 ISA with enhanced instructions Core supports 4-way multi-threading Fine-grain processing of 4 threads Programmable thread scheduling policies Branch Prediction and TLBs 750MHz operation Cache Subsystem Fully cache-coherent MOSI Protocol 8-way set-associative architectures L1 DedicatedPlus Cache® per thread allocation 32KB ECC-protected L1 writeback data caches 32KB parity-protected L1 instruction 256 KB ECC-protected banked writeback L2 cache High Speed Distributed Interconnects Connects MIPS core, caches, I/O and processing agents 6 simultaneous memory transactions per clock Throughput-optimized split transaction operations Fast Messaging Network™ for communication between processor and I/O Leading Edge Autonomous Accelerators High rate of bulk encryption / decryption Kasumi, DES/3DES, AES/AES-GCM, ARC4 (128, 192, 256) MD5, SHA-1, SHA-256/384/512 (All HMAC) RSA, DH and ECC Exponentiation and Multiplication ZLIB/Deflate/GZIP (RFC1950/1/2), 32KB Dictionary Size Networking Hardware Acceleration Packet Distribution Engine® for line rate processing Packet ordering assists TCP checksum verification / generation

General Purpose Programming Virtual MIPS Mode enables virtualization of unmapped memory region Supports both clustered and SMP modes Supports Parallel, Pipelined & Hybrid processing modes On-board debug support; performance monitoring Integrated System Interfaces PCMCIA interface Bootable NAND Flash memory interface Dual I2C interfaces Dual 16550 UART interfaces 32-bit GPIO interface IEEE 1149.1 JTAG and BIST functionality High Performance Memory Controller High speed DDR2 DRAM controller Advanced nibble error correction 1 x36 or 1 x72 mixed memory use 4-channel DMA controller with built-in CRC generation Extensive Networking and I/O Interfaces Four 10/100/1000 Ethernet MACs (4 SGMII, or 3 SGMII plus 1 RGMII) Packet distribution and order sequencing hardware Quad PCI Express 1.1 controllers supporting four independent x1 lanes Dual USB 2.0 ports support host and client mode Power Management Dynamic Clocking control On-chip thermal sensor Software-programmable clock throttling

Product Availability

The XLS204 is available in RoHS-compliant BGA packaging, and allows 750MHz operation at industrial (100°C) operating temperatures.

The XLS Processor® family is supported by a comprehensive software development kit (SDK) which contains reference and production-ready software components, including the NetLogic Microsystems OS accelerated wire-level OS, device drivers for open source Linux and commercial OS, complete tool chains, diagnostics, and the NetLogic Microsystems firmware suite. The SDK enables customers to quickly develop or migrate existing software to design high-performance, feature-rich solutions with ease.

Also available from NetLogic Microsystems are several evaluation platforms designed to allow customers to evaluate the entire product family’s integrated features and perform application tests in parallel with hardware development.

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Block Diagram

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Application Examples