Puma AEL1001
10GbE/10GFC LAN PHY/SerDes

NetLogic Microsystems' Puma AEL1001 device is a single channel CMOS physical layer transceiver optimized for use in XENPAK, X2 or XPAK optical module applications. Its serial interface supports data speeds of 10.3125 Gbps and 10.51875 Gbps and its flexible system-side interconnect supports interfacing with a MAC or ASIC XAUI interface.

The AEL1001 device uses NetLogic Microsystems' high-density PHY technology to offer an attractive combination of high performance (10 Gbps) and low power consumption (800 mW). Full PCS, PMA, and XGXS sub-layer functionality is provided through the consolidation of the receiver and transmitter PHY functions on a single chip along with the integration of encode/decode/alignment logic, FIFOs, on-chip clock drivers, multiple loop-back features and PRBS generation and verification for both the line side and the system side.

This combination reduces the number of components and enables XENPAK, X2 and XPAK optical modules to dissipate much less power in 10 Gbps Ethernet and Fibre Channel systems applications.

Benefits

• Low power dissipation enables smaller 10G optical modules – X2 and XPAK
• Optimized and field-tested for 10GBASE-LR/ER/ZR and DWDM modules
• Interoperated with 850nm, 1310nm, and 1550nm optical sub-assemblies from several optics vendors
• AEL1004/AEL1006 pin-compatible
• Meets IEEE XAUI Jitter Tolerance specifications for use in XENPAK, X2 and XPAK optical modules
• Fewer power supply filtering components ease board layout and reduce costs
• Integrated limiting amplifier improves receive sensitivity
• Programmable bit polarity and lane ordering allows flexible board layout
• Enhanced BIST features simplify optical modules testing

Features

• 800 mW power consumption
• On-chip clock generation and data recovery
• Dual reference clock frequency support
  (10GbE, 10G FC)
• Integrated limiting amplifier
• Programmable bit & lane ordering
• Adjustable XAUI transmit pre-emphasis
• Meets XENPAK MSA requirements
• Jumbo frames supported
• Multiple loop-back modes
• Packet, PRBS, CJPAT and CRPAT
  generators and checkers
• MDIO, JTAG & SDA/SCL physical interfaces
• 144 pin, 13x13mm PBGA package
• Low latency of 120ns

Applications

• 10 Gigabit Ethernet LAN/MAN/SAN Systems
• 10 Gigabit Fibre Channel SAN Applications
• 10GbE Add/drop Multiplexers
• 10GbE Switch/router Backbones
• 10GbE Hubs and Repeaters
• 10GbE/10Gb FC Test Equipment
• 10GbE Terabit Routers
• 10GbE NICs
• 10Gb FC HBAs